Technical Papers and Presentations

Non-charge-based logic is the notion that an electron can be trapped and its spin manipulated through application of gate voltages. Numerical simulations of Spin Single Electron Transistors (SSET) at University at Albany, aimed at practical development of post-CMOS concepts and devices is presented.

We use COMSOL based multiphysics finite element simulation strategy to solve the Schrödinger-Poisson equations self-consistently to obtain realistic confining and gating potentials for realistic device geometries. We will discuss the calculation of the gate-tuned "g-factor" for electrons and holes in electro-statically defined quantum dots including the Rashba and Dresselhaus spin-orbit interactions numerically from realistic wave functions for asymmetric and symmetric confining potentials.